[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Add `GPE0_STS_BIT` macro

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50916 )

Change subject: soc/intel/apollolake: Add `GPE0_STS_BIT` macro
......................................................................

soc/intel/apollolake: Add `GPE0_STS_BIT` macro

The datasheet indicates that this bit is reserved. However, subsequent
patches need to use this macro in common code, or else builds fail. To
iron out this difference, mask out the bit in `soc_get_smi_status`, so
that common code always sees it as zero. Finally, add an entry for the
bit in `smi_sts_bits` for debugging usage, noting that it is reserved.

Change-Id: Ib4408e016ba29cf8f7b125c95bfa668136b9eb93
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50916
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/apollolake/include/soc/pm.h
M src/soc/intel/apollolake/pmutil.c
2 files changed, 7 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index b40a12f..bc50b87 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -108,6 +108,7 @@
 #define  MC_SMI_STS_BIT		12
 #define  GPIO_UNLOCK_SMI_STS_BIT	11
 #define  GPIO_STS_BIT		10
+#define  GPE0_STS_BIT		9	/* Datasheet says this is reserved */
 #define  PM1_STS_BIT		8
 #define  SWSMI_TMR_STS_BIT	6
 #define  APM_STS_BIT		5
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index 1d4a558..8f222dd 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -48,6 +48,7 @@
    	[APM_STS_BIT] = "APM",
    	[SWSMI_TMR_STS_BIT] = "SWSMI_TMR",
    	[PM1_STS_BIT] = "PM1",
+		[GPE0_STS_BIT] = "GPE0 (reserved)",
    	[GPIO_STS_BIT] = "GPIO_SMI",
    	[GPIO_UNLOCK_SMI_STS_BIT] = "GPIO_UNLOCK_SSMI",
    	[MC_SMI_STS_BIT] = "MCSMI",
@@ -86,7 +87,11 @@
    		generic_sts |= (1 << PM1_STS_BIT);
    }

-	return generic_sts;
+	/*
+	 * GPE0_STS is reserved in APL/GLK datasheets. For compatibility
+	 * with common code, mask it out so that it is always zero.
+	 */
+	return generic_sts & ~(1 << GPE0_STS_BIT);
 }

const char *const *soc_tco_sts_array(size_t *a)