[coreboot-gerrit] Change in ...coreboot[master]: src: Remove not used variable

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, Julius Werner, Angel Pons, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/29917

to look at the new patch set (#7).

Change subject: src: Remove not used variable
......................................................................

src: Remove not used variable

Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/boot.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/device/dram/ddr3.c
M src/drivers/spi/sst.c
M src/lib/selfboot.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/haswell/raminit.c
M src/northbridge/intel/pineview/early_init.c
M src/northbridge/intel/x4x/dq_dqs.c
M src/northbridge/via/vx900/raminit_ddr3.c
M src/soc/cavium/common/bootblock.c
M src/soc/intel/fsp_baytrail/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/quark/i2c.c
M src/southbridge/amd/common/amd_pci_util.c
M src/southbridge/intel/fsp_rangeley/romstage.c
M src/southbridge/intel/i82371eb/fadt.c
19 files changed, 22 insertions(+), 68 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29917/7