[coreboot-gerrit] Change in coreboot[master]: [WIP] soc/amd/cezanne: add GPIO definitions

[Felix Held (Code Review)]

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48564 )

Change subject: [WIP] soc/amd/cezanne: add GPIO definitions
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48564/1/src/soc/amd/cezanne/include... 
File src/soc/amd/cezanne/include/soc/gpio.h:

https://review.coreboot.org/c/coreboot/+/48564/1/src/soc/amd/cezanne/include... 
PS1, Line 251: #define GPIO_140_IOMUX_GPIOxx 0
             : #define GPIO_140_IOMUX_UART0_CTS_L 1
> GPIO is func 1, and UART0_CTS_L is func 0, in RN PPR.

I just had a look at the revision 3.06 of the Renoir PPR and it matches both revision 3.00 of the Cezanne PPR and the code here. same for the other 3 ones below