[coreboot-gerrit] Change in coreboot[master]: soc/inte/alderlake: [TEST][PATCH 1/2] Enable hotplug and configure fr...

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Maulik V Vaghela, Rizwan Qureshi, Sugnan Prabhu S, Subrata Banik, Kane Chen, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52244 )

Change subject: soc/inte/alderlake: [TEST][PATCH 1/2] Enable hotplug and configure free clock for PCIe RPs
......................................................................

Patch Set 3:

(1 comment)

File src/soc/intel/alderlake/romstage/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-128397):
https://review.coreboot.org/c/coreboot/+/52244/comment/f2559a7b_7b070bdf 
PS3, Line 65: 	for (i = 0; i < cfg_count; i++) {
braces {} are not necessary for single statement blocks