Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35678 )
Change subject: intel/i945,i82801gx: Refactor early PCI bridge reset ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35678/1/src/northbridge/intel/i945/... File src/northbridge/intel/i945/early_init.c:
https://review.coreboot.org/c/coreboot/+/35678/1/src/northbridge/intel/i945/... PS1, Line 876: mdelay(200);
I think Patrick once said, it’s related to some crypto card.
We built the i945 code for secunet devices, some of which come with an FPGA card (that, indeed, implements some crypto services). That card didn't like the host system booting too fast, and so we put the delay in here.
I guess it's up to Nico to decide if secunet still cares about that particular use case. If they don't support the i945 based systems anymore and/or don't see them moving to master, I'd propose removing it here. If they intend to move to master, maybe it could be put in mainboard specific code (I think that card was only used in 986lcd-m?) instead, potentially behind a flag?
But it's really up to Nico since I have no say or knowledge about the current use of these devices.