HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49573 )
Change subject: (LGA775): Remove obsolete cache enable ......................................................................
(LGA775): Remove obsolete cache enable
cache already been enabled during mp-init.
Change-Id: Ia33484c72f2c995595b0c8dbeb9de3fba9d8d032 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/cpu/intel/model_6fx/model_6fx_init.c M src/cpu/intel/model_f3x/model_f3x_init.c M src/cpu/intel/model_f4x/model_f4x_init.c 3 files changed, 0 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/49573/1
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index d0987b4..836edc2 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -6,7 +6,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> #include <cpu/intel/speedstep.h> -#include <cpu/x86/cache.h> #include <cpu/x86/name.h>
#define HIGHEST_CLEVEL 3 @@ -110,9 +109,6 @@ { char processor_name[49];
- /* Turn on caching if we haven't already */ - x86_enable_cache(); - /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index bf08d7b..83b29faa 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -7,13 +7,9 @@ #include <cpu/intel/microcode.h> #include <cpu/intel/hyperthreading.h> #include <cpu/intel/common/common.h> -#include <cpu/x86/cache.h>
static void model_f3x_init(struct device *cpu) { - /* Turn on caching if we haven't already */ - x86_enable_cache(); - if (!CONFIG(PARALLEL_MP) && !intel_ht_sibling()) { /* MTRRs are shared between threads */ x86_setup_mtrrs(); diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index 5ebddc0..02b27a5 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -3,13 +3,9 @@ #include <device/device.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> -#include <cpu/x86/cache.h>
static void model_f4x_init(struct device *cpu) { - /* Turn on caching if we haven't already */ - x86_enable_cache(); - /* Enable the local CPU APICs */ setup_lapic(); };