[coreboot-gerrit] Change in coreboot[master]: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35165 )

Change subject: cpu/intel/car: Skip stack integrity check if FSP_USES_CB_STACK is enable
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Patch Set 3:
> Hi Philipp,
>
> The FSP does not mix stack and heap. For documentation on this feature, please see page 25 of the FSP v2.1 specification (https://cdrdv2.intel.com/v1/dl/getContent/611786). Here is the relevant paragraph:

Whoever submitted the lines below did not see or understand the text of that paragraph in FSP specification. There is little clue of anything related to heap or temporary RAM.

config FSP_USES_CB_STACK
    bool
    default n
    help
      Enable support for fsp to use same stack as coreboot.
      This option allows fsp to continue using coreboot stack
      without reinitializing stack pointer. This feature is
      supported Icelake onwards.

config DCACHE_BSP_STACK_SIZE
    hex
    default 0x20000 if FSP_USES_CB_STACK
    default 0x4000
    help
      The amount of anticipated stack usage in CAR by bootblock and
      other stages.

I think the previous comments were detailed enough to explain the situation; stack and heap must be carved out from CAR as two separate allocations. You are currently embedding this "temporary RAM" into the stack allocation, messing up the attempts to have usable stack guard checks.