Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35166 )
Change subject: soc/skl/vr_config: set Iccmax_gt depends on CPU/GT ......................................................................
soc/skl/vr_config: set Iccmax_gt depends on CPU/GT
According to the DC Current Specifications [1], the current limit for the graphical VR domain (Iccmax_gt) isn't same for different Kaby Lake S CPUs. This value should depend on the iGPU model and processor TDP:
+---------------------+-----+------------+ | Segment | TDP | Icc_max GT | +---------------------+-----+------------+ | Dual Core GT2/GT1 | 35W | | | Dual Core GT2 | 51W | 48 A | | Dual Core GT1 | 54W | | +---------------------+-----+------------+ | Quad Core GT2 | 35W | 35 A | +---------------------+-----+------------+ | Quad Core GT2 | 65W | 45 A | | Quad Core GT2 K-SKU | 91W | | +---------------------+-----+------------+
This patch adds the remaining Iccmax_gt current limit values from the documentation [1].
[1] 7th Generation Intel(R) Processor Families for S Platforms and Intel(R) Core(TM) X-Series Processor Family Datasheet, Volume 1, December 2018, Document Number: 335195-003
Change-Id: I19766e4f8fab6b48565b65ed4cf13efbc213e654 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35166 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/soc/intel/skylake/vr_config.c 1 file changed, 13 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c index 089dd5d..fc48558 100644 --- a/src/soc/intel/skylake/vr_config.c +++ b/src/soc/intel/skylake/vr_config.c @@ -117,12 +117,12 @@ * +----------------+-------------+---------------+------+-----+ * | Domain/Setting | SA | IA | GTUS | GTS | * +----------------+-------------+---------------+------+-----+ - * | IccMax(KBL-S) | 11.1A | 100A | 45A | 45A | - * | | | ... | | | - * | | | 40A | | | + * | IccMax(KBL-S) | 11.1A | 100A | 48A | 48A | + * | | | ... | 45A | 45A | + * | | | 40A | 35A | 35A | * +----------------+-------------+---------------+------+-----+ - * | IccMax(KBL-H) | 11.1A(45W) | 68A | 55A | 55A | - * | | 6.6A(Others)| 60A | | | + * | IccMax(KBL-H) | 11.1A (45W) | 68A | 55A | 55A | + * | | 6.6A (18W) | 60A | | | * +----------------+-------------+---------------+------+-----+ * | IccMax(KBL-U/R)| 6A(U42) | 64A(U42) | 31A | 31A | * | | 4.5A(Others)| 29A(P/C) | | | @@ -139,8 +139,8 @@ uint16_t icc_max[NUM_VR_DOMAINS] = { VR_CFG_AMP(11.1), VR_CFG_AMP(40), - VR_CFG_AMP(45), - VR_CFG_AMP(45), + VR_CFG_AMP(48), + VR_CFG_AMP(48), }; if (tdp >= 54) icc_max[VR_IA_CORE] = VR_CFG_AMP(58); @@ -155,13 +155,17 @@ uint16_t icc_max[NUM_VR_DOMAINS] = { VR_CFG_AMP(11.1), VR_CFG_AMP(66), - VR_CFG_AMP(55), - VR_CFG_AMP(55), + VR_CFG_AMP(45), + VR_CFG_AMP(45), }; if (tdp >= 91) icc_max[VR_IA_CORE] = VR_CFG_AMP(100); else if (tdp >= 65) icc_max[VR_IA_CORE] = VR_CFG_AMP(79); + else if (tdp >= 35) { + icc_max[VR_GT_UNSLICED] = VR_CFG_AMP(35); + icc_max[VR_GT_SLICED] = VR_CFG_AMP(35); + }
return icc_max[domain]; }