build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44712 )
Change subject: soc/mediatek/mt8192: Get DDR base information after calibration
......................................................................
Patch Set 45:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44712/45/src/soc/mediatek/mt8192/dr...
File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44712/45/src/soc/mediatek/mt8192/dr...
PS45, Line 3845: if (!wait_ms(timeout, READ32_BITFIELD(&ch[chn].nao.spcmdresp, SPCMDRESP_MRR_RESPONSE))) {
line over 96 characters
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ie62948368716d309aab8149372b2b6093fc33552
Gerrit-Change-Number: 44712
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