[coreboot-gerrit] [M] Change in coreboot[main]: soc/ibm/power9/*: add file structure for SOC

[Felix Singer (Code Review)]

Attention is currently required from: Felix Held, Igor Bagnucki, Krystian Hebel, Maciej Pijanowski, Martin L Roth, Michał Kopeć, Michał Żygowski, Paul Menzel, Sergii Dmytruk.

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67062?usp=email )

Change subject: soc/ibm/power9/*: add file structure for SOC
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Patch Set 33:

(3 comments)

File src/soc/ibm/power9/Kconfig:

https://review.coreboot.org/c/coreboot/+/67062/comment/936719c3_df0b90df :
PS33, Line 5: 	help
            : 	 
We usually put this after the selects.

File src/soc/ibm/power9/Makefile.mk:

PS33: 
Add a blank line between each of the three stages for better distinction.

File src/soc/ibm/power9/chip.c:

https://review.coreboot.org/c/coreboot/+/67062/comment/04a1f60a_45da61b0 :
PS33, Line 8: 	ram_range(dev, /*index=*/0, /*base=*/0, /*size=*/cbmem_top_chipset());
            : 	/* This is for OCC and HOMER images */
            : 	r
Why document the parameters here? The comments make it less readable and one can look up the functions if interested.