[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36550 )

Change subject: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock
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Patch Set 7:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... 
File src/soc/intel/tigerlake/bootblock/pch.c:

https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... 
PS1, Line 104: soc_config_acpibase
> Done

Yes, ACPI base is required to access GPE STS registers which are used in verstage.

https://review.coreboot.org/c/coreboot/+/36550/1/src/soc/intel/tigerlake/boo... 
PS1, Line 178: /* Set up GPE configuration */
             : 	pmc_gpe_init();
> Done

There is verstage code that relies on GPE being available and hence is is necessary to perform GPE initialization in bootblock.