Xiang Wang has uploaded a new patch set (#2). ( https://review.coreboot.org/27545 )
Change subject: riscv: update src/arch/riscv/bootblock.S ......................................................................
riscv: update src/arch/riscv/bootblock.S
Save the FDT pointer to memory. Make mscratch vacate for exception context switching.
Change-Id: I24554528969e36c9e98c0ebd733e002e215a52e5 Signed-off-by: Xiang Wang wxjstz@126.com --- M src/arch/riscv/bootblock.S 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/27545/2