Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35678 )
Change subject: intel/i945,i82801gx: Refactor early PCI bridge reset
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35678/1/src/northbridge/intel/i945/...
File src/northbridge/intel/i945/early_init.c:
https://review.coreboot.org/c/coreboot/+/35678/1/src/northbridge/intel/i945/...
PS1, Line 876: mdelay(200);
If we'd rebase that platform ever on master again, we'd have to validate […]
It was a pretty weird situation and the delay was determined experimentally (don't think that the card's vendor would have known about the necessary delay, there was no system that booted fast enough for it to matter). That is "it works, let's ship it".
Things would be handled differently today, but that only shows how far the project has come in the ~12 years since that change was made.
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