Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48738 )
Change subject: soc/intel/xeon_sp/cpx: Disable isoch operation for performance ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/48738/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48738/3//COMMIT_MSG@10 PS3, Line 10: Intel MLC (Memory Latency Checker) benchmark Thank you. It’s even publically available.
https://software.intel.com/content/www/us/en/develop/articles/intelr-memory-...
https://review.coreboot.org/c/coreboot/+/48738/3//COMMIT_MSG@12 PS3, Line 12: The MLC results after disabling isoch: Please add a blank line above for better legibility.
https://review.coreboot.org/c/coreboot/+/48738/3//COMMIT_MSG@13 PS3, Line 13: "--max_bandwidth" : ALL Reads : 106948.17 : 3:1 Reads-Writes : 101580.46 : 2:1 Reads-Writes : 100523.26 : 1:1 Reads-Writes : 99059.44 : Stream-triad like : 97762.47 : : "--peak_injection_bandwidth" : ALL Reads : 105724.3 : 3:1 Reads-Writes : 100655.8 : 2:1 Reads-Writes : 99463 : 1:1 Reads-Writes : 98708 : Stream-triad like : 91515 Thank you for the giving the after results. Could you please also post the results before the change, so the improvement can be seen?
https://review.coreboot.org/c/coreboot/+/48738/3//COMMIT_MSG@29 PS3, Line 29: Stray character.