Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74843?usp=email )
Change subject: soc/amd/common/data_fabric/domain: provide amd_pci_domain_fill_ssdt ......................................................................
Patch Set 12: Code-Review+1
(2 comments)
File src/soc/amd/common/block/data_fabric/domain.c:
https://review.coreboot.org/c/coreboot/+/74843/comment/10a63372_e121b9d1 : PS11, Line 169: if (base > PCI_IO_CONFIG_LAST_PORT || limit < PCI_IO_CONFIG_INDEX) {
added both a comment and CB:75613 to print a warning when a broken acpi io port producer resource ge […]
It seems more like our code is too limited wrt. 16-bit length. So the comment might suggest a bit too much.
https://review.coreboot.org/c/coreboot/+/74843/comment/881ed0a8_f25723c5 : PS11, Line 168: : if (base > PCI_IO_CONFIG_LAST_PORT || limit < PCI_IO_CONFIG_INDEX) { : /* no overlap with PCI config IO ports */ : write_ssdt_domain_io_range_helper(base, limit); : } else {/* overlap with PCI config IO ports */ : if (base == PCI_IO_CONFIG_INDEX && limit == PCI_IO_CONFIG_LAST_PORT) : return; /* IO range exactly covers the PCI config IO ports */ : if (base < PCI_IO_CONFIG_INDEX && limit > PCI_IO_CONFIG_LAST_PORT) { : /*spit IO range to not cover PCI config IO ports*/ : write_ssdt_domain_io_range_helper(base, PCI_IO_CONFIG_INDEX - 1); : write_ssdt_domain_io_range_helper(PCI_IO_CONFIG_LAST_PORT + 1, limit); : } else if (limit <= PCI_IO_CONFIG_LAST_PORT) { : write_ssdt_domain_io_range_helper(base, PCI_IO_CONFIG_INDEX - 1); : } else { /* base >= PCI_IO_CONFIG_INDEX */ : write_ssdt_domain_io_range_helper(PCI_IO_CONFIG_LAST_PORT + 1, limit); : } : }
integrated that into the patch. […]
Nvm.