Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45689 )
Change subject: mb/google/volteer/variants/eldrid: Configure GPP_S4 and GPP_S5 ......................................................................
mb/google/volteer/variants/eldrid: Configure GPP_S4 and GPP_S5
GPP_S4 and GPP_S5 use as DMIC pins that need to be defined as NF2
BUG=b:168564129
Signed-off-by: nick_xr_chen nick_xr_chen@wistron.corp-partner.google.com Change-Id: Ia1fca960ac85f253882f0aa68b370eed49ac67b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45689 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sathyanarayana Nujella sathyanarayana.nujella@intel.com Reviewed-by: Ravishankar Sarawadi ravishankar.sarawadi@intel.com --- M src/mainboard/google/volteer/variants/eldrid/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Ravishankar Sarawadi: Looks good to me, approved Sathyanarayana Nujella: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/volteer/variants/eldrid/gpio.c b/src/mainboard/google/volteer/variants/eldrid/gpio.c index 8ea1444e..4f6650b 100644 --- a/src/mainboard/google/volteer/variants/eldrid/gpio.c +++ b/src/mainboard/google/volteer/variants/eldrid/gpio.c @@ -154,9 +154,9 @@ /* S1 : SNDW0_DATA ==> SNDW0_HP_DATA_R */ PAD_CFG_NF(GPP_S1, NONE, DEEP, NF1), /* S4 : SNDW2_CLK ==> PCH_DMIC_CAM_SCL_R */ - PAD_CFG_NF(GPP_S4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), /* S5 : SNDW2_DATA ==> PCH_DMIC_CAM_SDA_R */ - PAD_CFG_NF(GPP_S5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2),
/* GPD9: SLP_WLAN# ==> SLP_WLAN_L */ PAD_CFG_NF(GPD9, NONE, DEEP, NF1),