Attention is currently required from: Christian Walter, Elyes Haouas, Martin L Roth, Maximilian Brune, Philipp Hug, ron minnich.
Hello Christian Walter, Martin L Roth, Maximilian Brune, Philipp Hug, build bot (Jenkins), ron minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85729?usp=email
to look at the new patch set (#12).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: Upgrade GCC to 15-20250112 Snapshot ......................................................................
Upgrade GCC to 15-20250112 Snapshot
And remove unmantained riscv & opensbi
Change-Id: I644fae70488c26ba833c2332059e805e50764c2a Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M .gitmodules D 3rdparty/opensbi M MAINTAINERS M Makefile.mk D configs/config.emulation_qemu_riscv_rv64 D configs/config.sifive_hifive-unleashed.opensbi M payloads/Kconfig M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/Kconfig.name M payloads/external/LinuxBoot/Makefile D payloads/external/LinuxBoot/riscv/defconfig-32 D payloads/external/LinuxBoot/riscv/defconfig-64 D payloads/external/LinuxBoot/riscv/kernel_fdt_lzma.its M payloads/external/LinuxBoot/targets/u-root.mk M payloads/external/Makefile.mk M payloads/external/linux/Kconfig.name D src/arch/riscv/Kconfig D src/arch/riscv/Makefile.mk D src/arch/riscv/arch_timer.c D src/arch/riscv/boot.c D src/arch/riscv/bootblock.S D src/arch/riscv/fit_payload.c D src/arch/riscv/fp_asm.S D src/arch/riscv/include/arch/barrier.h D src/arch/riscv/include/arch/boot.h D src/arch/riscv/include/arch/byteorder.h D src/arch/riscv/include/arch/cache.h D src/arch/riscv/include/arch/cbconfig.h D src/arch/riscv/include/arch/cpu.h D src/arch/riscv/include/arch/encoding.h D src/arch/riscv/include/arch/errno.h D src/arch/riscv/include/arch/exception.h D src/arch/riscv/include/arch/header.ld D src/arch/riscv/include/arch/hlt.h D src/arch/riscv/include/arch/io.h D src/arch/riscv/include/arch/memlayout.h D src/arch/riscv/include/arch/mmio.h D src/arch/riscv/include/arch/pmp.h D src/arch/riscv/include/arch/smp/atomic.h D src/arch/riscv/include/arch/smp/smp.h D src/arch/riscv/include/arch/smp/spinlock.h D src/arch/riscv/include/bits.h D src/arch/riscv/include/mcall.h D src/arch/riscv/include/sbi.h D src/arch/riscv/include/vm.h D src/arch/riscv/mcall.c D src/arch/riscv/misc.c D src/arch/riscv/opensbi.c D src/arch/riscv/payload.c D src/arch/riscv/pmp.c D src/arch/riscv/ramstage.S D src/arch/riscv/romstage.S D src/arch/riscv/sbi.c D src/arch/riscv/smp.c D src/arch/riscv/tables.c D src/arch/riscv/trap_handler.c D src/arch/riscv/trap_util.S D src/arch/riscv/virtual_memory.c M src/commonlib/bsd/lz4_wrapper.c M src/drivers/uart/Kconfig M src/drivers/uart/Makefile.mk D src/drivers/uart/sifive.c M src/include/acpi/acpi.h M src/include/bootmem.h M src/include/program_loading.h M src/include/rules.h M src/lib/bootmem.c M src/lib/libgcc.c M src/mainboard/emulation/Kconfig D src/mainboard/emulation/qemu-riscv/Kconfig D src/mainboard/emulation/qemu-riscv/Kconfig.name D src/mainboard/emulation/qemu-riscv/Makefile.mk D src/mainboard/emulation/qemu-riscv/board_info.txt D src/mainboard/emulation/qemu-riscv/cbmem.c D src/mainboard/emulation/qemu-riscv/chip.c D src/mainboard/emulation/qemu-riscv/clint.c D src/mainboard/emulation/qemu-riscv/devicetree.cb D src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h D src/mainboard/emulation/qemu-riscv/mainboard.c D src/mainboard/emulation/qemu-riscv/memlayout.ld D src/mainboard/emulation/qemu-riscv/rom_media.c D src/mainboard/emulation/qemu-riscv/romstage.c D src/mainboard/emulation/qemu-riscv/uart.c D src/mainboard/emulation/spike-riscv/Kconfig D src/mainboard/emulation/spike-riscv/Kconfig.name D src/mainboard/emulation/spike-riscv/Makefile.mk D src/mainboard/emulation/spike-riscv/board_info.txt D src/mainboard/emulation/spike-riscv/clint.c D src/mainboard/emulation/spike-riscv/devicetree.cb D src/mainboard/emulation/spike-riscv/mainboard.c D src/mainboard/emulation/spike-riscv/memlayout.ld D src/mainboard/emulation/spike-riscv/rom_media.c D src/mainboard/emulation/spike-riscv/romstage.c D src/mainboard/emulation/spike-riscv/uart.c D src/mainboard/sifive/Kconfig D src/mainboard/sifive/Kconfig.name D src/mainboard/sifive/hifive-unleashed/Kconfig D src/mainboard/sifive/hifive-unleashed/Kconfig.name D src/mainboard/sifive/hifive-unleashed/Makefile.mk D src/mainboard/sifive/hifive-unleashed/board_info.txt D src/mainboard/sifive/hifive-unleashed/devicetree.cb D src/mainboard/sifive/hifive-unleashed/fixup_fdt.c D src/mainboard/sifive/hifive-unleashed/fu540-c000.dtsi D src/mainboard/sifive/hifive-unleashed/hifive-unleashed-a00.dts D src/mainboard/sifive/hifive-unleashed/mainboard.c D src/mainboard/sifive/hifive-unleashed/media.c D src/mainboard/sifive/hifive-unleashed/romstage.c D src/mainboard/sifive/hifive-unmatched/Kconfig D src/mainboard/sifive/hifive-unmatched/Kconfig.name D src/mainboard/sifive/hifive-unmatched/Makefile.mk D src/mainboard/sifive/hifive-unmatched/board_info.txt D src/mainboard/sifive/hifive-unmatched/cbfs_spi.c D src/mainboard/sifive/hifive-unmatched/devicetree.cb D src/mainboard/sifive/hifive-unmatched/fixup_fdt.c D src/mainboard/sifive/hifive-unmatched/fu740-c000.dtsi D src/mainboard/sifive/hifive-unmatched/hifive-unmatched-a00-mod.dts D src/mainboard/sifive/hifive-unmatched/hifive-unmatched-a00.dts D src/mainboard/sifive/hifive-unmatched/mainboard.c D src/mainboard/sifive/hifive-unmatched/romstage.c D src/soc/sifive/fu540/Kconfig D src/soc/sifive/fu540/Makefile.mk D src/soc/sifive/fu540/bootblock.c D src/soc/sifive/fu540/cbmem.c D src/soc/sifive/fu540/chip.c D src/soc/sifive/fu540/clint.c D src/soc/sifive/fu540/clock.c D src/soc/sifive/fu540/ddrregs.h D src/soc/sifive/fu540/include/soc/addressmap.h D src/soc/sifive/fu540/include/soc/clock.h D src/soc/sifive/fu540/include/soc/otp.h D src/soc/sifive/fu540/include/soc/sdram.h D src/soc/sifive/fu540/include/soc/spi.h D src/soc/sifive/fu540/memlayout.ld D src/soc/sifive/fu540/otp.c D src/soc/sifive/fu540/regconfig-ctl.h D src/soc/sifive/fu540/regconfig-phy.h D src/soc/sifive/fu540/sdram.c D src/soc/sifive/fu540/spi.c D src/soc/sifive/fu540/spi_internal.h D src/soc/sifive/fu540/uart.c D src/soc/sifive/fu540/ux00ddr.h D src/soc/sifive/fu740/Kconfig D src/soc/sifive/fu740/Makefile.mk D src/soc/sifive/fu740/TODO D src/soc/sifive/fu740/cbmem.c D src/soc/sifive/fu740/chip.c D src/soc/sifive/fu740/clint.c D src/soc/sifive/fu740/clock.c D src/soc/sifive/fu740/ddrregs.c D src/soc/sifive/fu740/gpio.c D src/soc/sifive/fu740/include/soc/addressmap.h D src/soc/sifive/fu740/include/soc/clock.h D src/soc/sifive/fu740/include/soc/gpio.h D src/soc/sifive/fu740/include/soc/otp.h D src/soc/sifive/fu740/include/soc/sdram.h D src/soc/sifive/fu740/include/soc/spi.h D src/soc/sifive/fu740/memlayout.ld D src/soc/sifive/fu740/otp.c D src/soc/sifive/fu740/sdram.c D src/soc/sifive/fu740/spi.c D src/soc/sifive/fu740/spi_internal.h D src/soc/sifive/fu740/uart.c D src/soc/ucb/riscv/Kconfig D src/soc/ucb/riscv/Makefile.mk D src/soc/ucb/riscv/cbmem.c D src/soc/ucb/riscv/chip.c M util/crossgcc/buildgcc R util/crossgcc/patches/gcc-15-20250112_asan_shadow_offset_callback.patch R util/crossgcc/patches/gcc-15-20250112_gnat.patch R util/crossgcc/patches/gcc-15-20250112_libcpp.patch R util/crossgcc/patches/gcc-15-20250112_libgcc.patch R util/crossgcc/patches/gcc-15-20250112_musl_poisoned_calloc.patch R util/crossgcc/patches/gcc-15-20250112_rv32iafc.patch D util/crossgcc/sum/gcc-14.2.0.tar.xz.cksum A util/crossgcc/sum/gcc-15-20250112.tar.xz.cksum D util/riscv/description.md D util/riscv/make-spike-elf.sh D util/riscv/sifive-gpt.py D util/riscv/spike-elf.ld 179 files changed, 57 insertions(+), 13,590 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85729/12