Attention is currently required from: Shaunak Saha, Tim Wawrzynczak, Subrata Banik, Michael Niewöhner, Patrick Rudolph.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51649 )
Change subject: soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias pads
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Patch Set 16:
(3 comments)
File src/soc/intel/common/block/tcss/tcss.c:
https://review.coreboot.org/c/coreboot/+/51649/comment/d7acfc39_464d1aa2
PS16, Line 320: 0xb7
Isn't this SoC-dependent?
https://review.coreboot.org/c/coreboot/+/51649/comment/60480fba_121b5620
PS16, Line 338: } vw_indexes[] = {
I think this table will have to come from each SoC. The community definitions are SoC-specific and I think it is going to be true for VW indexes too.
https://review.coreboot.org/c/coreboot/+/51649/comment/6cad3d5b_6c383c1a
PS16, Line 374: (pad >= GPP_H0 && pad <= GPP_H23)
Isn't this specific to TGL?
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