[coreboot-gerrit] Change in coreboot[master]: mb/pcengines/apu1: Disable memory bank interleaving

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52779 )

Change subject: mb/pcengines/apu1: Disable memory bank interleaving
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mb/pcengines/apu1: Disable memory bank interleaving

Bank interleaving does not work on this platform, disable it.
AmdInitPost returns success thanks to this setting.

TEST=boot apu1 and see AGESA_SUCCESS after AmdInitPost

Signed-off-by: Michał Żygowski 
Change-Id: Id555b458c61df9a27a93f44f600d1718867106ca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52779
Tested-by: build bot (Jenkins) 
Reviewed-by: Krystian Hebel 
Reviewed-by: Angel Pons 
---
M src/mainboard/pcengines/apu1/OemCustomize.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Krystian Hebel: Looks good to me, but someone else must approve

diff --git a/src/mainboard/pcengines/apu1/OemCustomize.c b/src/mainboard/pcengines/apu1/OemCustomize.c
index d6edf03..254947c 100644
--- a/src/mainboard/pcengines/apu1/OemCustomize.c
+++ b/src/mainboard/pcengines/apu1/OemCustomize.c
@@ -101,4 +101,6 @@
 void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
 {
    InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
+	/* Bank interleaving is not supported on this platform */
+	InitPost->MemConfig.EnableBankIntlv = FALSE;
 }