[coreboot-gerrit] Change in ...coreboot[master]: mb/emulation/qemu-riscv: Support arbitrary ROM sizes

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33412

Change subject: mb/emulation/qemu-riscv: Support arbitrary ROM sizes
......................................................................

mb/emulation/qemu-riscv: Support arbitrary ROM sizes

Make the linker script dynamic to support non default ROM sizes.
Prevents weird runtime issues due to stages overwriting parts of the
CBFS while decompressing stages.

Change-Id: I37b9187c719b907959f02a272ec0459aabbcda3c
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/emulation/qemu-riscv/memlayout.ld
1 file changed, 7 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33412/1

diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 032fbdd..57a7da4 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -17,13 +17,16 @@
 #include <arch/header.ld>

#define START 0x80000000
+//Stages start after CBFS in DRAM
+#define STAGES_START (START + CONFIG_COREBOOT_ROMSIZE_KB * 1024)

SECTIONS
 {
    DRAM_START(START)
    BOOTBLOCK(START, 64K)
-	STACK(START + 4M, 4K)
-	ROMSTAGE(START + 4M + 64K, 128K)
-	PRERAM_CBMEM_CONSOLE(START + 4M + 192K, 8K)
-	RAMSTAGE(START + 4M + 200K, 16M)
+	// CBFS goes here
+	STACK(STAGES_START, 4K)
+	ROMSTAGE(STAGES_START + 64K, 128K)
+	PRERAM_CBMEM_CONSOLE(STAGES_START + 192K, 8K)
+	RAMSTAGE(STAGES_START + 200K, 16M)
 }