[coreboot-gerrit] New patch to review for coreboot: tegra124: use the common verstage flow

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11776

-gerrit

commit b82447c7634bcc9fe87e91770a2eea0798e9becb
Author: Aaron Durbin 
Date:   Thu Oct 1 16:24:28 2015 -0500

tegra124: use the common verstage flow

Though the tegra124 SoC makes their faster cpus come up
    in verstage it can still use the common flow. Therefore,
    use the common verstage API for performing thenecessary
    steps to initialize the caches on the faster cores.

BUG=chrome-os-partner:44827
    BRANCH=None
    TEST=Built nyan.

Change-Id: I93023ec92a9de111db688742b057b5c64143f0b3
    Signed-off-by: Aaron Durbin 
---
 src/soc/nvidia/tegra124/verstage.c | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c
index 0012766..e2092e4 100644
--- a/src/soc/nvidia/tegra124/verstage.c
+++ b/src/soc/nvidia/tegra124/verstage.c
@@ -27,6 +27,7 @@
 #include <soc/early_configs.h>
 #include <stdlib.h>
 #include <symbols.h>
+#include <vendorcode/google/chromeos/chromeos.h>

static void enable_cache(void)
 {
@@ -40,27 +41,17 @@ static void enable_cache(void)
    dcache_mmu_enable();
 }

-/* Do the minimum to run vboot at full speed */
-static void soc_init(void)
+void verstage_mainboard_init(void)
 {
+	/* Do the minimum to run vboot at full speed */
    configure_l2_cache();
-	console_init();
-	exception_init();
    enable_cache();
-}
-
-static void verstage(void)
-{
-	soc_init();
    early_mainboard_init();
-	run_romstage();
 }

void main(void)
 {
    asm volatile ("bl arm_init_caches"
    	      : : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
-
    verstage();
-	hlt();
 }