[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add ability to disable Heci1

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32992 )

Change subject: soc/intel/cannonlake: Add ability to disable Heci1
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Patch Set 13:

(1 comment)

https://review.coreboot.org/#/c/32992/13/src/soc/intel/cannonlake/fsp_params... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/32992/13/src/soc/intel/cannonlake/fsp_params... 
PS13, Line 344:  !CONFIG(SOC_INTEL_COMETLAKE)
I am a bit confused about the two ways of disabling Heci1:
1. Using FSP
2. Using SMM

From a previous change that was pushed, it looks like for CNL, SMM was being used: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/cannonlake/...

With this change, it looks like CNL is using FSP to disable Heci1? Also, why is this done for all cannonlake SoCs except cometlake? Is that just a matter of FSP header being udpated?