Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85437?usp=email )
Change subject: soc/intel/common: Drop locking function fast_spi_set_vcl ......................................................................
soc/intel/common: Drop locking function fast_spi_set_vcl
Drop function fast_spi_set_vcl as the same code already exists as fast_spi_vscc0_lock() and is already run on xeon_sp.
Change-Id: I86180c209e2d550c2bac3ace9cc344eabf950af0 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/common/block/fast_spi/fast_spi.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h M src/soc/intel/xeon_sp/ebg/lockdown.c M src/soc/intel/xeon_sp/ibl/lockdown.c 4 files changed, 0 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/85437/1
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 0a23e08..4551961 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -464,17 +464,6 @@ pci_or_config32(dev, SPI_BIOS_DECODE_EN, SPI_BIOS_DECODE_LOCK); }
-/* Set FAST_SPIBAR + SPIBAR_SFDP0_VSCC0 (0xc4) Vendor Control Lock */ -void fast_spi_set_vcl(void) -{ - void *spibar = fast_spi_get_bar(); - uint32_t vcss; - - vcss = read32(spibar + SPIBAR_SFDP0_VSCC0); - vcss |= SPIBAR_SFDP0_VSCC0_VCL; - write32(spibar + SPIBAR_SFDP0_VSCC0, vcss); -} - void fast_spi_clear_outstanding_status(void) { void *spibar = fast_spi_get_bar(); diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 46b4f48..716f16a 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -107,9 +107,5 @@ * Set FAST_SPIBAR BIOS Decode Lock bit */ void fast_spi_set_bde(void); -/* - * Set FAST_SPIBAR Vendor Component Lock bit. - */ -void fast_spi_set_vcl(void);
#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ diff --git a/src/soc/intel/xeon_sp/ebg/lockdown.c b/src/soc/intel/xeon_sp/ebg/lockdown.c index 694e4a2..4ced721 100644 --- a/src/soc/intel/xeon_sp/ebg/lockdown.c +++ b/src/soc/intel/xeon_sp/ebg/lockdown.c @@ -13,6 +13,5 @@ { if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { fast_spi_set_bde(); - fast_spi_set_vcl(); } } diff --git a/src/soc/intel/xeon_sp/ibl/lockdown.c b/src/soc/intel/xeon_sp/ibl/lockdown.c index 694e4a2..4ced721 100644 --- a/src/soc/intel/xeon_sp/ibl/lockdown.c +++ b/src/soc/intel/xeon_sp/ibl/lockdown.c @@ -13,6 +13,5 @@ { if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { fast_spi_set_bde(); - fast_spi_set_vcl(); } }