Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36878 )
Change subject: sb/intel/common: Properly guard USB debug ......................................................................
sb/intel/common: Properly guard USB debug
The declarations in usb_debug.c needs to be guarded in order to not conflict with other chipsets.
Change-Id: I84c3401b9419f2878c2cfdf81147fa854018f9ae Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc M src/southbridge/intel/fsp_rangeley/Kconfig M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/lynxpoint/Kconfig 10 files changed, 15 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/36878/1
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index f561fe5..c01e2b9 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -47,6 +47,7 @@ select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
config EHCI_BAR hex diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 57c0dbe..55134a6 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -46,6 +46,9 @@ config SOUTHBRIDGE_INTEL_COMMON_FINALIZE bool
+config SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG + bool + config INTEL_DESCRIPTOR_MODE_CAPABLE def_bool n help diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 9ff0ebc..c8521e1 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -28,9 +28,9 @@ all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
-bootblock-$(CONFIG_USBDEBUG) += usb_debug.c -romstage-$(CONFIG_USBDEBUG) += usb_debug.c -ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c
bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig index 56c02b5..b69883f 100644 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ b/src/southbridge/intel/fsp_rangeley/Kconfig @@ -34,6 +34,7 @@ select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
config EHCI_BAR hex diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 916560a..3fdc674 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -23,6 +23,7 @@ select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 17ee4fc..6e7910f 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -33,6 +33,7 @@ select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
if SOUTHBRIDGE_INTEL_I82801GX
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index cd2f76d..bb80408 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -33,6 +33,7 @@ select INTEL_DESCRIPTOR_MODE_CAPABLE select ACPI_INTEL_HARDWARE_SLEEP_VALUES select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
if SOUTHBRIDGE_INTEL_I82801IX
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index 7f44fcf..8db8e0c 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -35,7 +35,8 @@ select ACPI_INTEL_HARDWARE_SLEEP_VALUES select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
if SOUTHBRIDGE_INTEL_I82801JX
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index c84a66d..b419f34 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -45,6 +45,7 @@ select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
config EHCI_BAR hex diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 95b9f62..ef071f2 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -45,6 +45,7 @@ select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
config INTEL_LYNXPOINT_LP bool