Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38211 )
Change subject: util/inteltool: Add MCHBAR dumping support for Ice Lake U systems ......................................................................
util/inteltool: Add MCHBAR dumping support for Ice Lake U systems
According to intels datasheet
Document Number: 341078-001 10th Generation Intel® Core™ Processor Families Volume 2 of 2
we can dump the ICL MCHBAR similiar as on 8th / 9th gen CPUs. The difference is that on ICL the MCHBAR address is definited by the bits 38:16 instead of 38:15 giving the constraint that it has to be 64kbit instead of 32kbit aligned. (Section 3.1.13)
Change-Id: Ia597a4b3738c11cb48ce5808d8459b4a2a768077 Signed-off-by: Johanna Schander coreboot@mimoja.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/38211 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com --- M util/inteltool/memory.c 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index e80f1ba..e7523f3 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -232,6 +232,12 @@ mchbar_phys &= 0x0000007fffff8000UL; /* 38:15 */ size = 32768; break; + case PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U: + mchbar_phys = pci_read_long(nb, 0x48); + mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32; + mchbar_phys &= 0x0000007fffff0000UL; /* 38:16 */ + size = 32768; + break; default: printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n"); return 1;