Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30466 )
Change subject: soc/sifive/fu540: add code to initialize flash ......................................................................
Patch Set 23:
(3 comments)
https://review.coreboot.org/#/c/30466/22/src/soc/sifive/fu540/spi_flash.c File src/soc/sifive/fu540/spi_flash.c:
https://review.coreboot.org/#/c/30466/22/src/soc/sifive/fu540/spi_flash.c@29 PS22, Line 29: // Max desired SPI clock is 10MHz
why? is that a soc limit?
Not a limit, this is a desired value, used to ensure that FLASH can work, this comment may not be good
https://review.coreboot.org/#/c/30466/22/src/soc/sifive/fu540/spi_flash.c@40 PS22, Line 40: int _initialize_spi_flash_mmap(
what does this function do?
This function is used to map flash to memory space and tells soc how to operate flash
https://review.coreboot.org/#/c/30466/22/src/soc/sifive/fu540/spi_flash.c@63 PS22, Line 63: int initialize_spi_flash_mmap_single(
where's the difference to initialize_spi_flash_mmap_quad ?
These two functions are used to set the SPI to use how many data lines to transfer data. This setting is now moved to ffmt_rawbits, so repeat this feature.