[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Switch to highest DDR frequency to reduce bootup...

[Yidi Lin (Code Review)]

Yidi Lin has uploaded a new patch set (#34) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44730 )

Change subject: soc/mediatek/mt8192: Switch to highest DDR frequency to reduce bootup time
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soc/mediatek/mt8192: Switch to highest DDR frequency to reduce bootup time

Signed-off-by: Huayang Duan 
Change-Id: Ib37ecc7bf3f1776d27161948e779ed1f96ee9a0c
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M src/soc/mediatek/mt8192/dramc_dvfs.c
M src/soc/mediatek/mt8192/dramc_pi_main.c
2 files changed, 195 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44730/34