Attention is currently required from: Angel Pons.
Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70148 )
Change subject: nb/intel/pineview: Use {true,false} instead of {0,1} ......................................................................
nb/intel/pineview: Use {true,false} instead of {0,1}
"use_crt" and "use_lvds" are boolean, so use "true/false".
Change-Id: I5b5b42c27351331ad40fbe92fb87390cb1284aa9 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/mainboard/foxconn/d41s/devicetree.cb M src/mainboard/gigabyte/ga-d510ud/devicetree.cb M src/mainboard/intel/d510mo/devicetree.cb 3 files changed, 17 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/70148/1
diff --git a/src/mainboard/foxconn/d41s/devicetree.cb b/src/mainboard/foxconn/d41s/devicetree.cb index 766d68f..828f5bb 100644 --- a/src/mainboard/foxconn/d41s/devicetree.cb +++ b/src/mainboard/foxconn/d41s/devicetree.cb @@ -2,8 +2,8 @@
chip northbridge/intel/pineview # Northbridge register "gfx.use_spread_spectrum_clock" = "0" - register "use_crt" = "1" - register "use_lvds" = "0" + register "use_crt" = "true" + register "use_lvds" = "false"
device cpu_cluster 0 on # APIC cluster chip cpu/intel/socket_FCBGA559 # CPU diff --git a/src/mainboard/gigabyte/ga-d510ud/devicetree.cb b/src/mainboard/gigabyte/ga-d510ud/devicetree.cb index 9fb5ff5..18f96c64 100644 --- a/src/mainboard/gigabyte/ga-d510ud/devicetree.cb +++ b/src/mainboard/gigabyte/ga-d510ud/devicetree.cb @@ -1,7 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-only
chip northbridge/intel/pineview - register "use_crt" = "1" + register "use_crt" = "true"
device cpu_cluster 0 on chip cpu/intel/socket_FCBGA559 diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb index 4b5449f..0464b74 100644 --- a/src/mainboard/intel/d510mo/devicetree.cb +++ b/src/mainboard/intel/d510mo/devicetree.cb @@ -2,8 +2,8 @@
chip northbridge/intel/pineview # Northbridge register "gfx.use_spread_spectrum_clock" = "0" - register "use_crt" = "1" - register "use_lvds" = "0" + register "use_crt" = "true" + register "use_lvds" = "false"
device cpu_cluster 0 on # APIC cluster chip cpu/intel/socket_FCBGA559 # CPU