[coreboot-gerrit] Change in coreboot[master]: soc/intel/denverton_ns: Initialize thermal configuration

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/25439 )

Change subject: soc/intel/denverton_ns: Initialize thermal configuration
......................................................................

soc/intel/denverton_ns: Initialize thermal configuration

Change-Id: I7e1b924154256f8f82ded3d0fa155b3e836d9375
Signed-off-by: Julien Viard de Galbert 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/25439
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/soc/intel/denverton_ns/cpu.c
M src/soc/intel/denverton_ns/include/soc/msr.h
2 files changed, 20 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 1fd233a..1dc0830 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -53,6 +53,21 @@
    write_cr4(read_cr4() | CR4_MCE);
 }

+static void configure_thermal_core(void)
+{
+	msr_t msr;
+
+	/* Disable Thermal interrupts */
+	msr.lo = 0;
+	msr.hi = 0;
+	wrmsr(IA32_THERM_INTERRUPT, msr);
+	wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
+
+	msr = rdmsr(IA32_MISC_ENABLE);
+	msr.lo |= THERMAL_MONITOR_ENABLE_BIT;	/* TM1/TM2/EMTTM enable */
+	wrmsr(IA32_MISC_ENABLE, msr);
+}
+
 static void denverton_core_init(struct device *cpu)
 {
    msr_t msr;
@@ -62,6 +77,9 @@
    /* Clear out pending MCEs */
    dnv_configure_mca();

+	/* Configure Thermal Sensors */
+	configure_thermal_core();
+
    /* Enable Fast Strings */
    msr = rdmsr(IA32_MISC_ENABLE);
    msr.lo |= FAST_STRINGS_ENABLE_BIT;
diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h
index 1f64235..89caf44 100644
--- a/src/soc/intel/denverton_ns/include/soc/msr.h
+++ b/src/soc/intel/denverton_ns/include/soc/msr.h
@@ -22,6 +22,8 @@
 #define MSR_FLEX_RATIO 0x194
 #define FLEX_RATIO_LOCK (1 << 20)
 #define FLEX_RATIO_EN (1 << 16)
+/*      IA32_MISC_ENABLE 0x1a0 */
+#define  THERMAL_MONITOR_ENABLE_BIT (1 << 3)
 #define MSR_MISC_PWR_MGMT 0x1aa
 #define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)
 #define MSR_TURBO_RATIO_LIMIT 0x1ad