Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34791 )
Change subject: soc/intel/cannonlake: Speed up postcar loading using intermediate caching ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... PS9, Line 167: /* Cache the ROM as WP just below 4GiB. */
Those would be just TSEG marked WB (CB:34995) and the POSTCAR_STAGE=n case (CB:34995 + CB:34791 + […]
best number might be this one.
localhost ~ # cbmem -t 56 entries total:
0:1st timestamp 12,337 5:start of verified boot 39,349 (27,011) 503:starting to initialize TPM 39,951 (601) 504:finished TPM initialization 76,640 (36,688) 505:starting to verify keyblock/preamble (RSA) 78,060 (1,420) 506:finished verifying keyblock/preamble (RSA) 92,786 (14,725) 507:starting to verify body (load+SHA2+RSA) 92,788 (2) 508:finished loading body (ignore for x86) 215,488 (122,700) 509:finished calculating body hash (SHA2) 234,161 (18,672) 510:finished verifying body signature (RSA) 236,868 (2,706) 511:starting TPM PCR extend 237,495 (627) 512:finished TPM PCR extend 253,037 (15,541) 513:starting locking TPM 253,037 (0) 514:finished locking TPM 261,325 (8,288) 6:end of verified boot 269,633 (8,307) 13:starting to load romstage 269,651 (18) 14:finished loading romstage 269,651 (0) 1:start of romstage 269,656 (5) 2:before ram initialization 269,699 (42) 950:calling FspMemoryInit 272,541 (2,841) 951:returning from FspMemoryInit 297,977 (25,435) 3:after ram initialization 301,304 (3,327) 15:starting LZMA decompress (ignore for x86) 301,800 (495) 16:finished LZMA decompress (ignore for x86) 336,745 (34,944) 4:end of romstage 338,748 (2,003) 550:starting to load Chrome OS VPD 339,715 (966) 10:start of ramstage 340,075 (360) 30:device enumeration 385,569 (45,494) 954:calling FspSiliconInit 394,083 (8,514) 955:returning from FspSiliconInit 482,500 (88,416) 40:device configuration 498,082 (15,582) 956:calling FspNotify(AfterPciEnumeration) 532,478 (34,395) 957:returning from FspNotify(AfterPciEnumeration) 532,789 (311) 50:device enable 532,977 (188) 60:device initialization 552,688 (19,710) 70:device setup done 585,699 (33,011) 75:cbmem post 586,209 (509) 80:write tables 586,328 (119) 15:starting LZMA decompress (ignore for x86) 589,021 (2,693) 16:finished LZMA decompress (ignore for x86) 589,279 (258) 85:finalize chips 589,900 (620) 90:load payload 603,089 (13,189) 15:starting LZMA decompress (ignore for x86) 603,354 (265) 16:finished LZMA decompress (ignore for x86) 651,314 (47,960) 958:calling FspNotify(ReadyToBoot) 651,824 (510) 959:returning from FspNotify(ReadyToBoot) 654,020 (2,195) 960:calling FspNotify(EndOfFirmware) 654,115 (95) 961:returning from FspNotify(EndOfFirmware) 654,522 (406) 99:selfboot jump 654,992 (470) 1000:depthcharge start 655,011 (18) 1002:RO vboot init 655,123 (112) 1020:vboot select&load kernel 655,126 (3) 1030:finished EC verification 675,365 (20,238) 1040:finished storage device initialization 676,391 (1,026) 1050:finished reading kernel from disk 683,493 (7,102) 1100:finished vboot kernel verification 820,191 (136,697) 1101:jumping to kernel 822,694 (2,502)
Total Time: 810,332