Tim Chu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48946 )
Change subject: mb/ocp/deltalake: Override DDR frequency limit via VPD variable ......................................................................
mb/ocp/deltalake: Override DDR frequency limit via VPD variable
Use VPD variable "fsp_dimm_freq" to select DDR frequency limit.
Tested=On OCP Delta Lake, DDR frequency limit can be changed via VPD.
Signed-off-by: Tim Chu Tim.Chu@quantatw.com Change-Id: I1232feae5090420d8fa42596b46f2d4dcaf9d635 --- M src/mainboard/ocp/deltalake/romstage.c M src/mainboard/ocp/deltalake/vpd.h 2 files changed, 26 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/48946/1
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index f0cdd3d..58ee968 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -75,6 +75,28 @@ printk(BIOS_DEBUG, "Setting MemRefreshWatermark %d from VPD\n", val); mupd->FspmConfig.UnusedUpdSpace0[0] = val; } + + /* + * Select DDR Frequency Limit + * 0x0:Auto, 0x5:DDR_1333, 0x7:DDR_1600, 0x9:DDR_1866, 0xb:DDR_2133, 0xd:DDR_2400, + * 0xf:DDR_2666, 0x11:DDR_2933, 0x13:DDR_3200 + */ + static const unsigned int limit[] = { 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf, 0x11, 0x13}; + if (vpd_gets(FSP_DIMM_FREQ, val_str, VPD_LEN, VPD_RW_THEN_RO)) { + val = (uint8_t)atol(val_str); + if (val > 8) { + printk(BIOS_DEBUG, "Invalid DdrFreqLimit value from VPD: " + "%d\n", val); + val = FSP_DIMM_FREQ_DEFAULT; + } + printk(BIOS_DEBUG, "Setting DdrFreqLimit %d from VPD\n", val); + mupd->FspmConfig.DdrFreqLimit = limit[val]; + } else { + printk(BIOS_INFO, "Not able to get VPD %s, default set " + "DebugPrintLevel to %d\n", FSP_DIMM_FREQ, + FSP_DIMM_FREQ_DEFAULT); + mupd->FspmConfig.DdrFreqLimit = limit[FSP_DIMM_FREQ_DEFAULT]; + } }
/* Update bifurcation settings according to different Configs */ diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h index 71a3b09..9246fb0 100644 --- a/src/mainboard/ocp/deltalake/vpd.h +++ b/src/mainboard/ocp/deltalake/vpd.h @@ -40,4 +40,8 @@ #define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark" #define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
+/* FSP dimm frequency limit, 0:Auto, 1:DDR_1333, 2:DDR_1600, 3:DDR_1866, 4:DDR_2133, 5:DDR_2400, 6:DDR_2666, 7:DDR_2933, 8:DDR_3200 */ +#define FSP_DIMM_FREQ "fsp_dimm_freq" +#define FSP_DIMM_FREQ_DEFAULT 0 + #endif