Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45391 )
Change subject: drivers/intel/fsp2_0: use FSP to allocate APEI BERT memory region
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Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45391/3//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/45391/3//COMMIT_MSG@13
PS3, Line 13: oreboot
nit: maybe this typo happened with the reflow.
Done
https://review.coreboot.org/c/coreboot/+/45391/3//COMMIT_MSG@12
PS3, Line 12: In case of FSP 2.x,
: oreboot gets BERT region raw data from FSP (PREV_BOOT_ERROR_SRC_HOB).
I would put this info about getting the raw data from FSP into the commit message for your "generate […]
Done
https://review.coreboot.org/c/coreboot/+/45391/3//COMMIT_MSG@30
PS3, Line 30: Another option is to reserve the BERT region under CBMEM.
nit: maybe "An option considered was... However... […]
Done
https://review.coreboot.org/c/coreboot/+/45391/3/src/drivers/intel/fsp2_0/ho...
File src/drivers/intel/fsp2_0/hob_verify.c:
https://review.coreboot.org/c/coreboot/+/45391/3/src/drivers/intel/fsp2_0/ho...
PS3, Line 52:
remove extra line
Done
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