Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34640 )
Change subject: tegra210: Increase size of verstage due to overflow ......................................................................
Patch Set 6:
To be honest - I got no clue. The size of the .elf file is 105300 in both cases.
The full size of an ELF doesn't tell you much because there are tons of debugging symbols and the like bloating it up. Please run util/crossgcc/xgcc/bin/aarch64-elf-objdump -p on it. 'memsz' is the size that needs to fit into SRAM. That must somehow be going up with your patch, I just want to know how much (it should really not be more than a couple of bytes because your changes shouldn't really affect this platform.
The .debug file is bigger with the VBOOT Changes from the other patch, but still it should have no effect here. Can I safely decrease the size of the CBFS_CACHE from 32 to 30? That would at least solve the problem. Or how can I check the compressed size of the verstage?
Yes, but this patch (moving romstage space to verstage) should also be fine (assuming romstage also still fits). I don't have anything against the patch directly but I want to confirm that your other patches are not causing a big binary size regression first. (Compressed size is irrelevant for this stuff.)