[coreboot-gerrit] Change in coreboot[master]: mb/up/squared: Fill LPDDR4 dimm info

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34564 )

Change subject: mb/up/squared: Fill LPDDR4 dimm info
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mb/up/squared: Fill LPDDR4 dimm info

Fill the dimm info struct to make SMBIOS type 17 appear.

TODO: Find out how to read the memory sku id and support
other boards that don't have 2GiB "K4F8E304HB-MGCJ".

Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/up/squared/romstage.c
1 file changed, 23 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/34564/1

diff --git a/src/mainboard/up/squared/romstage.c b/src/mainboard/up/squared/romstage.c
index 2cfaa00..3235fab 100644
--- a/src/mainboard/up/squared/romstage.c
+++ b/src/mainboard/up/squared/romstage.c
@@ -94,3 +94,26 @@
    memcpy(memupd->FspmConfig.Ch3_Bit_swizzling, &ch3_bit_swizzling,
    		sizeof(ch3_bit_swizzling));
 }
+
+static const struct lpddr4_sku skus[] = {
+	/* Samsung 280 K4F8E304HB-MGCJ 8Gb dual-ch */
+	[0] = {
+		.speed = LP4_SPEED_2400,
+		.ch0_rank_density = LP4_8Gb_DENSITY,
+		.ch1_rank_density = LP4_8Gb_DENSITY,
+		.ch0_dual_rank = 0,
+		.ch1_dual_rank = 0,
+		.part_num = "K4F8E304HB-MGCJ",
+	},
+};
+
+static const struct lpddr4_cfg lp4cfg = {
+	.skus = skus,
+	.num_skus = ARRAY_SIZE(skus),
+};
+
+void mainboard_save_dimm_info(void)
+{
+	/* FIXME: Add support for reading current memsku from GPIOs */
+	save_lpddr4_dimm_info(&lp4cfg, 0);
+}