[coreboot-gerrit] Change in coreboot[master]: mb/google/dedede: Add SD card support

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39237 )

Change subject: mb/google/dedede: Add SD card support
......................................................................

mb/google/dedede: Add SD card support

1. Configure SD card GPIOs.
2. Set SD card power polarity and card detect configs.

SD card CMD. DATA and CLK GPIOs are set for native pad termination
as per recommendation in EDS vol1 section 10.4.10

BUG=b:150872580
TEST=Verify SD card enumeration and read/write transactions.

Change-Id: I90c8ceb85ada23718ff7b6fd7013317c818dd532
Signed-off-by: Aamir Bohra 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39237
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/dedede/variants/baseboard/devicetree.cb
M src/mainboard/google/dedede/variants/baseboard/gpio.c
2 files changed, 19 insertions(+), 10 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 72ce7c1..a856b22 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -114,6 +114,11 @@
    # Enable EMMC HS400 mode
    register "ScsEmmcHs400Enabled" = "1"

+	# GPIO for SD card detect
+	register "sdcard_cd_gpio" = "VGPIO_39"
+	# SD card power enable polarity
+	register "SdCardPowerEnableActiveHigh" = "1"
+
    # Display related UPDs
    # Select eDP for port A
    register "DdiPortAConfig" = "1"
@@ -255,7 +260,7 @@
    		register "wake" = "GPE0_PME_B0"
    		device pci 14.3 on  end # CNVi wifi
    	end
-		device pci 14.5 off end # SDCard
+		device pci 14.5 on  end # SDCard
    	device pci 15.0 on  end # I2C 0
    	device pci 15.1 on  end # I2C 1
    	device pci 15.2 on  end # I2C 2
diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c
index ca28e3d..e62140e 100644
--- a/src/mainboard/google/dedede/variants/baseboard/gpio.c
+++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c
@@ -267,26 +267,26 @@
    PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1),

/* G0  : SD_CMD */
-	PAD_NC(GPP_G0, NONE),
+	PAD_CFG_NF(GPP_G0, NATIVE, DEEP, NF1),
    /* G1  : SD_DATA0 */
-	PAD_NC(GPP_G1, NONE),
+	PAD_CFG_NF(GPP_G1, NATIVE, DEEP, NF1),
    /* G2  : SD_DATA1 */
-	PAD_NC(GPP_G2, NONE),
+	PAD_CFG_NF(GPP_G2, NATIVE, DEEP, NF1),
    /* G3  : SD_DATA2 */
-	PAD_NC(GPP_G3, NONE),
+	PAD_CFG_NF(GPP_G3, NATIVE, DEEP, NF1),
    /* G4  : SD_DATA3 */
-	PAD_NC(GPP_G4, NONE),
+	PAD_CFG_NF(GPP_G4, NATIVE, DEEP, NF1),
    /* G5  : SD_CD_ODL */
-	PAD_NC(GPP_G5, NONE),
+	PAD_CFG_NF(GPP_G5, NONE, PLTRST, NF1),
    /* G6  : SD_CLK */
-	PAD_NC(GPP_G6, NONE),
+	PAD_CFG_NF(GPP_G6, NATIVE, DEEP, NF1),
    /* G7  : SD_SDIO_WP */
-	PAD_NC(GPP_G7, NONE),
+	PAD_CFG_NF(GPP_G7, DN_20K, DEEP, NF1),

/* H0  : WWAN_PERST */
    PAD_NC(GPP_H0, NONE),
    /* H1  : EN_PP3300_SD_U */
-	PAD_NC(GPP_H1, NONE),
+	PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
    /* H2  : CNV_CLKREQ0 */
    PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
    /* H3  : GPP_H03/SX_EXIT_HOLDOFF_N */
@@ -382,6 +382,10 @@
    PAD_NC(GPD9, NONE),
    /* GPD10 : AP_SLP_S5_L */
    PAD_NC(GPD10, NONE),
+
+	/* SD card detect virtual GPIO */
+	PAD_CFG_GPI_GPIO_DRIVER(VGPIO_39, NONE, PLTRST),
+
 };

/* Early pad configuration in bootblock */