Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48446 )
Change subject: mb/google/brya: Add memory DQ map ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48446/1/src/mainboard/google/brya/v... File src/mainboard/google/brya/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/48446/1/src/mainboard/google/brya/v... PS1, Line 7: lpddr4x_cfg I think there is some work required in soc/intel/alderlake to organize the meminit code for ADL similar to TGL. Also bug here: b/172978729