Attention is currently required from: Subrata Banik, Kangheui Won, Reka Norman, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61106 )
Change subject: soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOC ......................................................................
Patch Set 9:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61106/comment/af43c6c2_cf3e6fb5 PS7, Line 15: b:213535859
Can you please help to share an update here in this bug first. […]
Ack. Doc# 645548 Chapter 40 has Port IDs for GPIO communities. As highlighted in the commit message, GPIO groups 1-6 corresponds to GPIO communities 5-0 respectively.
File src/soc/intel/alderlake/gpio.c:
https://review.coreboot.org/c/coreboot/+/61106/comment/2a4ef8f6_7c105cad PS5, Line 124: #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
don't you just need to guard line #139 alone ?
Ack
https://review.coreboot.org/c/coreboot/+/61106/comment/441bd8fc_e6eddb74 PS5, Line 270: #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
won't below changes would be sufficient ? […]
Done
File src/soc/intel/alderlake/gpio.c:
https://review.coreboot.org/c/coreboot/+/61106/comment/53105f8d_9104c8f4 PS7, Line 126: { /* GPP S, I, H, D */
this is not correct for ADL-P. […]
Ack
File src/soc/intel/alderlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/61106/comment/1bc65a71_c37c67fe PS8, Line 174: * PAD Start Number = 75
Please also state numbers for adl-n.
Done
File src/soc/intel/alderlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/61106/comment/eea66f77_2e2eeefc PS5, Line 19: #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
CB:61165 for review
Thanks.
File src/soc/intel/alderlake/include/soc/gpio_soc_defs.h:
PS4:
I don't have a strong opinion on separate vs unified files. […]
Ack