[coreboot-gerrit] [M] Change in coreboot[master]: soc/intel/common: Order the CPUs based on their APIC IDs

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72131 )

Change subject: soc/intel/common: Order the CPUs based on their APIC IDs
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Patch Set 12:

Automatic boot test returned (PASS/FAIL/TOTAL): 7 / 1 / 8

PASS: x86_32  "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG 
     and payload TianoCore : https://lava.9esec.io/r/157275
PASS: x86_32  "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG 
     and payload SeaBIOS : https://lava.9esec.io/r/157274
PASS: x86_32  "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 
     and payload TianoCore : https://lava.9esec.io/r/157273
PASS: x86_32  "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 
     and payload SeaBIOS : https://lava.9esec.io/r/157272
PASS: x86_64  "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 
     and payload SeaBIOS : https://lava.9esec.io/r/157271
PASS: x86_32  "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN 
     and payload SeaBIOS : https://lava.9esec.io/r/157270
PASS: x86_32  "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ 
     and payload SeaBIOS : https://lava.9esec.io/r/157269
FAIL: x86_32  "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX 
     and payload SeaBIOS : https://lava.9esec.io/r/157268

Please note: This test is under development and might not be accurate at all!