[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/cmn/pmc: Add support for early power off

[Subrata Banik (Code Review)]

Attention is currently required from: Intel coreboot Reviewers.

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86336?usp=email )

Change subject: soc/intel/cmn/pmc: Add support for early power off
......................................................................

soc/intel/cmn/pmc: Add support for early power off

This commit introduces support for early power off on Intel platforms.
A new function, `platform_do_intel_early_poweroff`, is added to the
pmclib to handle platform-specific early power off procedures.

This function is called before memory initialization (in romstage or
earlier).

A weak default implementation is provided which prints an error message
and halts the system. Platforms needing early power off support must
override this weak function.

The existing poweroff() function is updated to use the new early power
off function when appropriate.

BUG=b:339673254
TEST=Able to build and boot google/brox.

Change-Id: I39f516640b3f75ab4c6a09826922289c0533f79b
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/block/include/intelblocks/pmclib.h
M src/soc/intel/common/block/pmc/pmclib.c
2 files changed, 32 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/86336/1

diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index 5423865..b9bf9ee 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -298,4 +298,19 @@
  */
 char *retrieve_soc_qdf_info_via_pmc_ipc(void);

+/*
+ * Performs platform-specific actions for early power off on Intel platforms.
+ *
+ * This function handles the necessary steps to initiate an early power off
+ * sequence on Intel-based hardware. This might involve configuring specific
+ * hardware registers, sending commands to power management controllers, or
+ * performing other platform-specific operations. It is crucial that this
+ * function is implemented correctly to ensure a clean and controlled shutdown.
+ *
+ * Note: Issuing power off early before memory initialization is not supported use case on
+ *       Intel chipset, therefore, it might need a special platform specific handing
+ *       to power-off the platform early.
+ */
+void platform_do_intel_early_poweroff(void);
+
 #endif /* SOC_INTEL_COMMON_BLOCK_PMCLIB_H */
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 8c48e88..c7b229d 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -62,6 +62,13 @@
    enum min_assert_dur pm_pwr_cyc_dur;
 };

+/* Perform platform specific override to add support for early power off */
+__weak void platform_do_intel_early_poweroff(void) {
+	printk(BIOS_EMERG, "This platform doesn't know how to power off before ramstage,"
+			" hanging!\n");
+	halt();
+}
+
 /* Default value of PchPmPwrCycDur */
 #define PCH_PM_PWR_CYC_DUR	0

@@ -615,7 +622,8 @@
    pmc_write_pm1_control(pm1_cnt);
 }

-void poweroff(void)
+/* Helper function to perform poweroff operation using PMC chipset register. */
+static void pmc_control_poweroff(void)
 {
    pmc_enable_pm1_control(SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT));

@@ -628,6 +636,14 @@
    	halt();
 }

+void poweroff(void)
+{
+	if (ENV_ROMSTAGE_OR_BEFORE)
+		platform_do_intel_early_poweroff();
+	else
+		pmc_control_poweroff();
+}
+
 void pmc_gpe_init(void)
 {
    uint32_t gpio_cfg = 0;