[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Read SPDs only once if measured boot is enabled

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39969 )

Change subject: nb/intel/sandybridge: Read SPDs only once if measured boot is enabled
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Patch Set 6:

(1 comment)

Looking at the code I cannot easily understand what you are trying to achieve.

https://review.coreboot.org/c/coreboot/+/39969/6//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/39969/6//COMMIT_MSG@10 
PS6, Line 10: CBFS
What do you measure? SPD read over smbus? MRC cache contents?
How do you handle first boot ( with no mrc cache) vs following boots?