[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/finalize.c: Lock down MC ARB register

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46680 )

Change subject: nb/intel/haswell/finalize.c: Lock down MC ARB register
......................................................................

nb/intel/haswell/finalize.c: Lock down MC ARB register

The Haswell System Agent BIOS Spec revision 0.6.0 indicates this
register needs to be locked, and Broadwell already locks it.

Tested on Asrock B85M Pro4, still boots and register is locked.

Change-Id: Icdeb39e2fdde1403b6ab83faed214addca863f4b
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46680
Reviewed-by: Nico Huber 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/haswell/finalize.c
M src/northbridge/intel/haswell/registers/mchbar.h
2 files changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index efbaf68..1c83110 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -24,6 +24,7 @@
    MCHBAR32_OR(REQLIM, 1UL << 31);
    MCHBAR32_OR(DMIVCLIM, 1UL << 31);
    MCHBAR32_OR(CRDTLCK, 1 << 0);
+	MCHBAR32_OR(MCARBLCK, 1 << 0);

/* Memory Controller Lockdown */
    MCHBAR8(MC_LOCK) = 0x8f;
diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
index bd99cee..97ae433 100644
--- a/src/northbridge/intel/haswell/registers/mchbar.h
+++ b/src/northbridge/intel/haswell/registers/mchbar.h
@@ -47,5 +47,6 @@
 #define REQLIM			0x6800
 #define DMIVCLIM		0x7000
 #define CRDTLCK			0x77fc
+#define MCARBLCK		0x7ffc

#endif /* __HASWELL_REGISTERS_MCHBAR_H__ */