[coreboot-gerrit] Change in coreboot[master]: mb/protectli/vault_kbl: Enable Intel PTT

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42565 )

Change subject: mb/protectli/vault_kbl: Enable Intel PTT
......................................................................

mb/protectli/vault_kbl: Enable Intel PTT

TEST=tweak PCR banks in SeaBIOS TPM menu, run tpm2_pcrlist in Linux

Signed-off-by: Michał Żygowski 
Change-Id: I7c443a25ca7259df9c0a07615d0502f47d25792e
---
M src/mainboard/protectli/vault_kbl/Kconfig
M src/mainboard/protectli/vault_kbl/devicetree.cb
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/42565/1

diff --git a/src/mainboard/protectli/vault_kbl/Kconfig b/src/mainboard/protectli/vault_kbl/Kconfig
index 8c09a60..518bb6d 100644
--- a/src/mainboard/protectli/vault_kbl/Kconfig
+++ b/src/mainboard/protectli/vault_kbl/Kconfig
@@ -11,6 +11,9 @@
    select SOC_INTEL_KABYLAKE
    select SPI_FLASH_MACRONIX
    select SUPERIO_ITE_IT8772F
+	select MAINBOARD_HAS_CRB_TPM
+	select HAVE_INTEL_PTT
+	select TPM2

config IRQ_SLOT_COUNT
    int
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index d3e8b23..bb408a4 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -305,4 +305,7 @@
    	device pci 1f.5 off end # PCH SPI
    	device pci 1f.6 off end # GbE
    end
+	chip drivers/crb
+		device mmio 0xfed40000 on end
+	end
 end