[coreboot-gerrit] [XS] Change in coreboot[main]: mainboard/google/fatcat: Set TCC offset

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86292?usp=email )

Change subject: mainboard/google/fatcat: Set TCC offset
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mainboard/google/fatcat: Set TCC offset

This commit sets the TCC offset for the Fatcat baseboard variant.
A value of 10 was chosen, resulting in a TCC trip point of 100C
(Tjmax of 110C - offset of 10C).

This allows for thermal throttling to begin at a more appropriate
temperature.

Fatcat variants can override the TCC offset as per platform
requirements between power and/or performance.

TEST=Able to build and boot to CrOS.

Change-Id: I2a57fd3b06378f4e62872ffeb116a65561100e33
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86292
Reviewed-by: Jamie Ryu 
Tested-by: build bot (Jenkins) 
Reviewed-by: Dinesh Gehlot 
---
M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Jamie Ryu: Looks good to me, approved
  Dinesh Gehlot: Looks good to me, approved

diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
index c217a15..b09f9e3 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
@@ -51,6 +51,9 @@
    # DPTF enable
    register "dptf_enable" = "true"

+	# Setting TCC of 100C = Tj max (110) - TCC_Offset (10)
+	register "tcc_offset" = "10"
+
    # Disable C1 C-state auto-demotion
    register "disable_c1_state_auto_demotion" = "true"
    # Disable PKGC-state auto-demotion