[coreboot-gerrit] Change in coreboot[master]: mb/google/zork: C-state IO base address alignment

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44135 )

Change subject: mb/google/zork: C-state IO base address alignment
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Patch Set 3:

I think a better approach is to establish that coreboot owns this register and AGESA should leave it alone.  So rather than adjust coreboot to match AGESA, how about moving the write of the BSP (in sb_init_acpi_ports()) to model_17_init() to write all cores?  I'll push a change for AGESA to skip the register for FSP.