[coreboot-gerrit] Change in coreboot[master]: src/soc/tigerlake: Add memory configuration support for Jasper Lake

[Meera Ravindranath (Code Review)]

Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39135 )

Change subject: src/soc/tigerlake: Add memory configuration support for Jasper Lake
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Patch Set 11:

(4 comments)

https://review.coreboot.org/c/coreboot/+/39135/7/src/soc/intel/tigerlake/inc... 
File src/soc/intel/tigerlake/include/soc/jsl_memcfg_init.h:

https://review.coreboot.org/c/coreboot/+/39135/7/src/soc/intel/tigerlake/inc... 
PS7, Line 31:  */
> Nit: Can be a comment in single line.

Done

https://review.coreboot.org/c/coreboot/+/39135/7/src/soc/intel/tigerlake/inc... 
PS7, Line 50:
> Nit: Use tab for indentation. I think space is being used.

Done

https://review.coreboot.org/c/coreboot/+/39135/7/src/soc/intel/tigerlake/inc... 
PS7, Line 70: struct spd_info spd[NUM_DIMM_SLOT];
> No it does not support different memories for each slot.  […]

Done

https://review.coreboot.org/c/coreboot/+/39135/7/src/soc/intel/tigerlake/inc... 
PS7, Line 136: void jasperlake_memcfg_init(FSP_M_CONFIG *mem_cfg,
             : 			    const struct jsl_mb_cfg *jsl_cfg);
> Ack

Done