[coreboot-gerrit] Change in coreboot[master]: sb/intel/i82801jx/sata.c: Handle ABAR as a resource

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42643 )

Change subject: sb/intel/i82801jx/sata.c: Handle ABAR as a resource
......................................................................

sb/intel/i82801jx/sata.c: Handle ABAR as a resource

Instead of directly reading ABAR without any checking, do like i82801ix
and treat it as a resource. This prevents problems if ABAR is not set.

Change-Id: I4f888b748204860b0a7e1bf5611f5f3e487e8081
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42643
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Rudolph 
---
M src/southbridge/intel/i82801jx/sata.c
1 file changed, 6 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Rudolph: Looks good to me, approved

diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index 73a7d82..0372460 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -20,9 +20,14 @@
 {
    int i;
    u32 reg32;
+	struct resource *res;

/* Initialize AHCI memory-mapped space */
-	u8 *abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_5);
+	if (!res)
+		return;
+
+	u8 *abar = res2mmio(res, 0, 0);
    printk(BIOS_DEBUG, "ABAR: %p\n", abar);

/* Set AHCI access mode.