[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Move PCR DMI programming into bootblock

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23866 )

Change subject: soc/intel/skylake: Move PCR DMI programming into bootblock
......................................................................

Patch Set 7:

(1 comment)

File src/soc/intel/skylake/bootblock/pch.c:

https://review.coreboot.org/c/coreboot/+/23866/comment/160ea3cf_1f8165d0 
PS3, Line 186: 	if (pch_check_decode_enable() == 0) {
> That a register can't be written when locked is clear, so far. But […]

Well, and then there is that difference in PCH-H vs PCH-LP which use DMI.SRL vs. MPC.SRL ;-)

From the other discussions and tests that happened meanwhile:
- The lock gets set in PCIe enum complete notify phase.
- The lock does not survive reboot (tested), probably does not survive RSMRST (assumption), even if it does see below..
- The only case I could think of atm is that values change during S3/S5, but that's highly unlikely.