Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8566
-gerrit
commit 8fe278f19cce7669a18940678a177ff2f8aace9f Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Mon Feb 23 11:37:41 2015 +0200
AMD K8 fam10: HT link subordinate FIXME
Change-Id: I930f2beacdc95d0a7edd07db66a1c2e58bb2f3cd Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/northbridge/amd/amdfam10/northbridge.c | 43 +++++++++++++--------- src/northbridge/amd/amdk8/northbridge.c | 57 ++++++++++++++++++++---------- 2 files changed, 65 insertions(+), 35 deletions(-)
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index cf47a78..68c79c0 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -138,10 +138,23 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn)
}
-static void ht_route_link(struct bus *link) +#define HT_ROUTE_SCAN 0 +#define HT_ROUTE_FINAL 1 + +static void ht_route_link(struct bus *link, int mode) { +#if 0 u32 busses;
+ if (mode == HT_ROUTE_SCAN) { + if (link->dev->bus->subordinate == 0) + link->secondary = 0; + else + link->secondary = link->dev->bus->subordinate + 1; + + link->subordinate = link->secondary; + } + /* Configure the bus numbers for this bridge: the configuration * transactions will not be propagated by the bridge if it is * not correctly configured @@ -150,6 +163,14 @@ static void ht_route_link(struct bus *link) busses &= 0xffff00ff; busses |= ((u32)(link->secondary) << 8); pci_write_config32(link->dev, link->cap + 0x14, busses); + + if (mode == HT_ROUTE_FINAL) { + if (CONFIG_HT_CHAIN_DISTRIBUTE) + link->dev->bus->subordinate = ALIGN_UP(link->subordinate, 8) - 1; + else + link->dev->bus->subordinate = link->subordinate; + } +#endif }
static u32 amdfam10_scan_chain(struct bus *link, u32 max) @@ -165,17 +186,7 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) * so we set the subordinate bus number to 0xff for the moment. */
- if (max != 0) - max++; - - /* One node can have 8 link and segn is the same. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE) - max = ALIGN_UP(max, 8); - - link->secondary = max; - link->subordinate = 0xfc; - - ht_route_link(link); + ht_route_link(link, HT_ROUTE_SCAN);
/* set the config map space */ set_config_map_reg(link); @@ -183,22 +194,22 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max) /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link */ - max = hypertransport_scan_chain(link, max); + + link->subordinate = hypertransport_scan_chain(link, link->secondary);
/* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value */ - link->subordinate = max; - if (0) { /* Clear the extend reg. */ clear_config_map_reg(link); } + ht_route_link(link, HT_ROUTE_FINAL);
set_config_map_reg(link);
store_ht_c_conf_bus(link); - return max; + return link->subordinate; }
/* Do sb ht chain at first, in case s2885 put sb chain diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 872be51..35e7206 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -79,20 +79,50 @@ static void f1_write_config32(unsigned reg, u32 value) } }
-static void ht_route_link(struct bus *link) +#define HT_ROUTE_SCAN 0 +#define HT_ROUTE_FINAL 1 + +static void ht_route_link(struct bus *link, int mode) { +#if 0 u32 busses;
+ if (mode == HT_ROUTE_SCAN) { + if (link->dev->bus->subordinate == 0) + link->secondary = 0; + else + link->secondary = link->dev->bus->subordinate + 1; + + link->subordinate = link->secondary; + } + /* Configure the bus numbers for this bridge: the configuration * transactions will not be propagated by the bridge if it is * not correctly configured */ busses = pci_read_config32(link->dev, link->cap + 0x14); busses &= 0xff000000; - busses |= (((unsigned int)(link->dev->bus->secondary) << 0) | - ((unsigned int)(link->secondary) << 8) | - ((unsigned int)(link->subordinate) << 16)); + busses |= link->dev->bus->secondary & 0xff; + if (mode == HT_ROUTE_CLOSE) { + busses |= 0xfeff << 8; + } else if (mode == HT_ROUTE_SCAN) { + busses |= ((u32) link->secondary & 0xff) << 8; + busses |= 0xff << 16; /* MAX PCI_BUS number here */ + } else if (mode == HT_ROUTE_FINAL) { + busses |= ((u32) link->secondary & 0xff) << 8; + busses |= ((u32) link->subordinate & 0xff) << 16; + } + pci_write_config32(link->dev, link->cap + 0x14, busses); + + if (mode == HT_ROUTE_FINAL) { + /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ + if (CONFIG_HT_CHAIN_DISTRIBUTE) + link->dev->bus->subordinate = ALIGN_UP(link->subordinate, 0x40) - 1; + else + link->dev->bus->subordinate = link->subordinate; + } +#endif }
static u32 amdk8_nodeid(device_t dev) @@ -140,17 +170,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) * so we set the subordinate bus number to 0xff for the moment. */
- if (max != 0) - max++; - - /* Second chain will be on 0x40, third 0x80, forth 0xc0. */ - if (CONFIG_HT_CHAIN_DISTRIBUTE) - max = ALIGN_UP(max, 0x40); - - link->secondary = max; - link->subordinate = 0xff; - - ht_route_link(link); + ht_route_link(link, HT_ROUTE_SCAN);
config_busses = f1_read_config32(config_reg); config_busses &= 0x000fc88; @@ -165,14 +185,13 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) /* Now we can scan all of the subordinate busses i.e. the * chain on the hypertranport link */ - max = hypertransport_scan_chain(link, max); + link->subordinate = hypertransport_scan_chain(link, link->secondary);
/* We know the number of busses behind this bridge. Set the * subordinate bus number to it's real value */ - link->subordinate = max;
- ht_route_link(link); + ht_route_link(link, HT_ROUTE_FINAL);
config_busses = (config_busses & 0x00ffffff) | (link->subordinate << 24); @@ -181,7 +200,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max) index = (config_reg-0xe0) >> 2; sysconf.hcdn_reg[index] = link->hcdn_reg;
- return max; + return link->subordinate; }
/* Do sb ht chain at first, in case s2885 put sb chain