Hello build bot (Jenkins), Joel Kitching, Patrick Georgi, Furquan Shaikh, Frans Hendriks, Lee Leahy, Patrick Rudolph, Angel Pons, Huang Jin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39221
to look at the new patch set (#4).
Change subject: vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled() ......................................................................
vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()
vboot_recovery_mode_enabled() was recently changed to assert() when it is called before vboot logic has run, because we cannot determine whether we're going to be in recovery mode at that point and we wanted to flush out existing uses that pretended that we could. Turns out there are a bunch of uses like that, and there is some code that is shared across configurations that can and those that can't.
This patch cleans them up to either remove checks that cannot return true, or add explicit Kconfig guards to clarify that the code is shared. This means that using a separate recovery MRC cache is no longer supported on boards that use VBOOT_STARTS_IN_ROMSTAGE (this has already been broken with CB:38780, but with this patch those boards will boot again using their normal MRC caches rather than just die). Skipping the MRC cache and always regenerating from scratch in recovery mode is likewise no longer supported for VBOOT_STARTS_IN_ROMSTAGE.
For FSP1.1 boards, none of them support VBOOT_STARTS_IN_BOOTBLOCK and that is unlikely to change in the future so we will just hardcode that fact in Kconfig (otherwise, fsp1.1 raminit would also have to be fixed to work around this issue).
Signed-off-by: Julius Werner jwerner@chromium.org Change-Id: I31bfc7663724fdacab9955224dcaf650d1ec1c3c --- M src/drivers/intel/fsp1_1/Kconfig M src/drivers/intel/fsp1_1/raminit.c M src/drivers/mrc_cache/Kconfig M src/drivers/mrc_cache/mrc_cache.c M src/northbridge/intel/haswell/raminit.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/soc/intel/baytrail/romstage/raminit.c M src/soc/intel/broadwell/romstage/raminit.c M src/southbridge/intel/bd82x6x/me_8.x.c 9 files changed, 12 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/39221/4