[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update TCSS PM flow

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45014 )

Change subject: soc/intel/tigerlake: Update TCSS PM flow
......................................................................

soc/intel/tigerlake: Update TCSS PM flow

s0xi fails while USB4 device is connected and PCIe tunneling is up.
There is need to change PM flow along with TBT firmware update. This
change invokes D3CE and D3CX in DMA _PS0 when _OFF was not called
earlier.

BUG=b:158777291
TEST=Validated s0ix with USB4 device connected along with TBT firmware
QS variants TBT_TGL_B0_CHROME_Rev33 image.

Signed-off-by: John Zhao 
Change-Id: Iebc8065fe4c8600960d089577608890ab12a95fc
---
M src/soc/intel/tigerlake/acpi/tcss.asl
M src/soc/intel/tigerlake/acpi/tcss_dma.asl
M src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
3 files changed, 33 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/45014/1

diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl
index 9893833..ed43e05 100644
--- a/src/soc/intel/tigerlake/acpi/tcss.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss.asl
@@ -524,6 +524,7 @@
    	If (_SB.PCI0.TDM0.VDID == 0xFFFFFFFF) {
    		Printf("TDM0 does not exist.")
    	} Else {
+			_SB.PCI0.TDM0.SCMP = 3
    		If (_SB.PCI0.TDM0.STAT == 0) {
    			/* DMA0 is in D3Cold early. */
    			_SB.PCI0.TDM0.D3CX()  /* RTD3 Exit */
@@ -554,6 +555,7 @@
    	If (_SB.PCI0.TDM0.VDID == 0xFFFFFFFF) {
    		Printf("TDM0 does not exist.")
    	} Else {
+			_SB.PCI0.TDM0.SCMP = 2
    		If (_SB.PCI0.TDM0.STAT == 1) {
    			/* DMA0 is not in D3Cold now. */
    			_SB.PCI0.TDM0.D3CE()  /* Enable DMA RTD3 */
@@ -579,6 +581,7 @@
    	If (_SB.PCI0.TDM1.VDID == 0xFFFFFFFF) {
    		Printf("TDM1 does not exist.")
    	} Else {
+			_SB.PCI0.TDM1.SCMP = 3
    		If (_SB.PCI0.TDM1.STAT == 0) {
    			/* DMA1 is in D3Cold early. */
    			_SB.PCI0.TDM1.D3CX()  /* RTD3 Exit */
@@ -609,6 +612,7 @@
    	If (_SB.PCI0.TDM1.VDID == 0xFFFFFFFF) {
    		 Printf("TDM1 does not exist.")
    	} Else {
+			_SB.PCI0.TDM1.SCMP = 2
    		If (_SB.PCI0.TDM1.STAT == 1) {
    			/* DMA1 is not in D3Cold now */
    			_SB.PCI0.TDM1.D3CE()  /* Enable DMA RTD3. */
diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
index da2e8fe..df96576 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
@@ -72,6 +72,28 @@
  */
 Name (SD3C, 0)

+/* SW CM Power State Flow Control */
+Name (SCMP, 0)
+
+Method (_PS0, 0, Serialized)
+{
+	If (SCMP != 3) {
+		If (DUID == 0) {
+			_SB.PCI0.TG0F()
+			_SB.PCI0.TG0N()
+		} Else {
+			_SB.PCI0.TG1F()
+			_SB.PCI0.TG1N()
+		}
+	}
+	SCMP = 0
+}
+
+Method (_PS3, 0, Serialized)
+{
+	SCMP = 1
+}
+
 Method (_DSW, 3)
 {
    /* If entering Sx (Arg1 > 1), need to skip TCSS D3Cold & TBT RTD3/D3Cold. */
diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
index abca5d1..9571e19 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
@@ -76,10 +76,14 @@

Method (_DSW, 3)
 {
-	C2PM (Arg0, Arg1, Arg2, DCPM)
    /* If entering Sx (Arg1 > 1), need to skip TCSS D3Cold & TBT RTD3/D3Cold. */
-	_SB.PCI0.TDM0.SD3C = Arg1
-	_SB.PCI0.TDM1.SD3C = Arg1
+	If ((TUID == 0) || (TUID == 1)) {
+		_SB.PCI0.TDM0.SD3C = Arg1
+	} Else {
+		_SB.PCI0.TDM1.SD3C = Arg1
+	}
+
+	C2PM (Arg0, Arg1, Arg2, DCPM)
 }

Method (_PRW, 0)